--- linux-2.4.19/drivers/char/sc520_wdt.c Fri Aug 2 19:39:43 2002 +++ linux-2.4.19-Elan-hbt-Ipsec/drivers/char/sc520_wdt.c Thu Nov 7 15:37:15 2002 @@ -95,6 +95,7 @@ /* #define MMCR_BASE_DEFAULT 0xfffef000 */ #define MMCR_BASE_DEFAULT ((__u16 *)0xffffe) #define OFFS_WDTMRCTL ((unsigned int)0xcb0) +#define OFFS_GPIO ((unsigned int)0xc00) #define WDT_ENB 0x8000 /* [15] Watchdog Timer Enable */ #define WDT_WRST_ENB 0x4000 /* [14] Watchdog Timer Reset Enable */ @@ -103,6 +104,7 @@ #define WRT_DOG(data) *wdtmrctl=data static __u16 *wdtmrctl; +static __u16 *gpio; static void wdt_timer_ping(unsigned long); static struct timer_list timer; @@ -117,6 +119,8 @@ static void wdt_timer_ping(unsigned long data) { + u_int8_t echo_mode; + /* If we got a heartbeat pulse within the WDT_US_INTERVAL * we agree to ping the WDT */ @@ -124,8 +128,13 @@ { /* Ping the WDT */ spin_lock(&wdt_spinlock); + echo_mode = readb(gpio); + writeb(echo_mode & 0xfe, gpio); + writew(0xAAAA, wdtmrctl); writew(0x5555, wdtmrctl); + + writeb(echo_mode, gpio); spin_unlock(&wdt_spinlock); /* Re-set the timer interval */ @@ -144,10 +153,15 @@ { __u16 dummy; unsigned long flags; + u_int8_t echo_mode; /* buy some time (ping) */ spin_lock_irqsave(&wdt_spinlock, flags); dummy=readw(wdtmrctl); /* ensure write synchronization */ + + echo_mode = readb(gpio); + writeb(echo_mode & 0xfe, gpio); + writew(0xAAAA, wdtmrctl); writew(0x5555, wdtmrctl); /* make WDT configuration register writable one time */ @@ -155,6 +169,8 @@ writew(0xCCCC, wdtmrctl); /* write WDT configuration register */ writew(writeval, wdtmrctl); + + writeb(echo_mode, gpio); spin_unlock_irqrestore(&wdt_spinlock, flags); } @@ -360,8 +376,12 @@ wdtmrctl = MMCR_BASE_DEFAULT; } + gpio = ioremap((unsigned long) ((char *)wdtmrctl + OFFS_GPIO), 1); + printk(KERN_INFO OUR_NAME ": WDT: Hinkle's Soekris GPIO fix initialised.\n"); + wdtmrctl = (__u16 *)((char *)wdtmrctl + OFFS_WDTMRCTL); wdtmrctl = ioremap((unsigned long)wdtmrctl, 2); + printk(KERN_INFO OUR_NAME ": WDT driver for SC520 initialised.\n"); return 0;